Altera EP2C8Q208C8N + ADC + DAC, SDRAM: 256M BIT, Flash: 64M BIT
Nhà sản xuất: Altera
Còn: 2 Cái
FPGA development board A-C8FB separate core board and backplane design, so users can easily develop late in doing it just using the core board can be completely separated from the other peripheral contacts. Particularly suitable for engineers R & D personnel , college students participate in the electronic
Or do graduate design competition design and so on.
Core Board Resource Details: board size length 90 mm, width 83 mm . Core board can be powered separately using
CPU: Hurricane is used in the second generation EP2C8Q208C8N, the chip is fully developed and applied to meet the general small .
Serial configuration chip: uses M25P16, 16M BIT capacity to save FPGA, power failure.
SDRAM memory : 256M BIT/32M BYTE is used
SRAM memory : 4M BIT SRAM is used and FLASH multiplexed data and address lines , because pin limited.
Fllash Storage: 64M BIT/8M BYTE is used in capacity and peripheral attention FLASH is multiplexed pins . Because the pin is limited.
Power supply: Using high-power LM1085-3.3V power supply, and ADJ adjustable AMS-1117 output 1.2V. If you are alone core board , the input DC 5V power supply . Core board is also equipped with a toggle switch. Also equipped with a power indicator . User debug circuit boards . Core board can be powered separately using a 2.54 pin .
Download Interface : JTAG and AS are two core board download interface for user convenience. You can debug programs using the JTAG interface , the use of AS-Interface to configure EPCS chip to power down to save your program.
Clock Input : Onboard 50M core board default active clock. Exceptions also set aside a crystal pad , convenient to use. The remaining six global clock interface is also cited out.
Button 2 : core board above a global reset button , and a reconfiguration button.
LED light-emitting diodes: core board above six separate light-emitting diodes , user debugging.
I / O ports : If you own it in the debugger , do not use SRAM FLASH, these two chips is set to a high impedance state on it. When not in use SRAM and FLASH circumstances, can provide 64 independent I / O ports and eight global clock inputs. Which has 32 I / O ports are completely independent , there are 32 and FLASH / SRAM reuse.
Backplane Resource Details: board size length 146 mm , width 119 mm .
Onboard 8 LED light-emitting diode display ( LCD dot matrix LED lights digital interface data lines are multiplexed )
Onboard 8 digital tube display ( LCD dot matrix LED lights digital interface data lines are multiplexed )
Onboard 8X8LED dot matrix display ( dot matrix digital tube LED light LCD interface data lines are multiplexed )
Onboard LCD1602/LCD12864 Interface ( dot matrix digital tube LED light LCD interface data lines are multiplexed ) Note that only the interface , excluding screen .
All the way to 512 -color VGA interface board display
Onboard 4 independent keys
Onboard way PS / 2 input
Onboard a backplane power switch
Onboard way buzzer ( required when using a DuPont wire connection )
On-board temperature sensor along DS18B20 ( required when using a DuPont wire connection )
Onboard way infrared receiver , the receiver remote control panel signals ( required when using a DuPont wire connection )
Onboard two SD card connector, a standard deck ( large ) , a mini deck ( small ) ( note that only deck, no card )
Onboard eight DIP switches ( of which four are and buttons multiplexing )
Onboard I2C devices , AT24C04
Onboard clock chip DS1302 ( with clock battery , saving time )
Onboard AD converter chip TLC549
Onboard DA converter chip TLC5620, 4 outputs.
Onboard ULN2003 stepper motor drive, drive small power
Onboard way RS485 interface ( no debugging yet , that is not the test procedure, the general R & D personnel will be used )
Onboard way RS232 interface
Onboard two-way RF interface input / or output ( Note: This interface can only input digital signal , the chip does not support the input analog signal )
FPGA-NIOS-SOPC development board learning board .
Model : A-C8FB ( new hot market )
You can play FPGA
You can play the NIOS II
You can play SOPC
This compact and powerful development board core board and backplane separation mode designed.
Core board front : FPGA chip Hurricane II EP2C8Q208C8N